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SPD06N60C3 CoolMOS Features TM Power Transistor Product Summary V DS @ T j,max R DS(on),max ID 650 0.75 6.2 V A * New revolutionary high voltage technology * Ultra low gate charge * Periodic avalanche rated * High peak current capability * Ultra low effective capacitances * Extreme dv /dt rated * Improved transconductance PG-TO252 Type SPD06N60C3 Package PG-TO252 Ordering Code Q67040-S4630 Marking 06N60C3 Maximum ratings, at T j=25 C, unless otherwise specified Parameter Continuous drain current Symbol Conditions ID T C=25 C T C=100 C Pulsed drain current1) Avalanche energy, single pulse Avalanche energy, repetitive t AR1),2) Avalanche current, repetitive t AR1) Drain source voltage slope Gate source voltage I D,pulse E AS E AR I AR dv /dt V GS V GS Power dissipation Operating and storage temperature Reverse diode dv/dt 7) Rev. 1.5 P tot T j, T stg dv/dt Page 1 I D=6.2 A, V DS=480 V, T j=125 C static AC (f >1 Hz) T C=25 C T C=25 C I D=3.1 A, V DD=50 V I D=6.2 A, V DD=50 V Value 6.2 3.9 18.6 200 0.5 6.2 50 20 30 74 -55 ... 150 15 W C V/ns 2008-04-11 A V/ns V mJ Unit A SPD06N60C3 Parameter Symbol Conditions min. Thermal characteristics Thermal resistance, junction - case R thJC R thJA Thermal resistance, junction ambient SMD version, device on PCB, minimal footprint SMD version, device on PCB, 6 cm2 cooling area3) T sold 1.6 mm (0.063 in.) from case for 10 s 1.7 75 K/W Values typ. max. Unit - 50 - Soldering temperature *) - - 260 C Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage Avalanche breakdown voltage Gate threshold voltage V (BR)DSS V GS=0 V, I D=250 A V (BR)DS V GS(th) V GS=0 V, I D=6.2 A V DS=V GS, I D=0.26 mA V DS=600 V, V GS=0 V, T j=25 C V DS=600 V, V GS=0 V, T j=150 C Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=10 V, I D=3.9 A, T j=25 C V GS=10 V, I D=3.9 A, T j=150 C Gate resistance Transconductance RG g fs f =1 MHz, open drain |V DS|>2|I D|R DS(on)max, I D=3.9 A 600 2.1 700 3 3.9 V Zero gate voltage drain current I DSS - 0.1 1 A - 0.68 100 100 0.75 nA - 1.82 1 5.6 S *) reflow soldering, MSL3 Rev. 1.5 Page 2 2008-04-11 SPDT06N60C3 Parameter Symbol Conditions min. Dynamic characteristics Input capacitance Output capacitance Reverse transfer capacitance C iss C oss C rss V GS=0 V, V DS=25 V, f =1 MHz V GS=0 V, V DS=0 V to 480 V V DD=480 V, V GS=10 V, I D=6.2 A, R G=12 47 7 12 52 10 ns 620 200 17 28 pF Values typ. max. Unit Effective output capacitance, energy C o(er) related4) Effective output capacitance, time related5) Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics Gate to source charge Gate to drain charge Gate charge total Gate plateau voltage 1) C o(tr) t d(on) tr t d(off) tf Q gs Q gd Qg V plateau V DD=480 V, I D=6.2 A, V GS=0 to 10 V - 3.3 12 24 5.5 31 - nC V Pulse width limited by maximum temperature T j,max only Repetitive avalanche causes additional power losses that can be calculated as P AV=E AR*f. 2) 3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air. 4) C o(er) is a fixed capacitance that gives the same stored energy as C oss while V DS is rising from 0 to 80% V DSS. C o(tr) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. 5) 7) ISD<=ID, di/dt<=400A/us, VDClink=400V, Vpeak Page 3 2008-04-11 SPD06N60C3 Parameter Symbol Conditions min. Reverse Diode Diode continuous forward current Diode pulse current Diode forward voltage Reverse recovery time Reverse recovery charge Peak reverse recovery current IS I S,pulse V SD t rr Q rr I rrm V R=480 V, I F=I S, di F/dt =100 A/s T C=25 C V GS=0 V, I F=6.2 A, T j=25 C 0.97 400 3.5 25 6.2 18.6 1.2 V ns C A A Values typ. max. Unit Typical Transient Thermal Characteristics Symbol Value typ. R th1 R th2 R th3 R th4 R th5 0.0325 0.0448 0.251 0.31 0.231 K/W C th1 C th2 C th3 C th4 C th5 C th6 Unit Symbol Value typ. 0.0000502 0.000303 0.000428 0.00243 0.00344 0.1986) Ws/K Unit C th6 models the additional heat capacitance of the package in case of non-ideal cooling. It is not needed if R thCA=0 K/W. 6) Rev. 1.5 Page 4 2008-04-11 SPD06N60C3 1 Power dissipation P tot=f(T C) 2 Safe operating area I D=f(V DS); T C=25 C; D =0 parameter: t p 80 102 limited by on-state resistance 1 s 60 10 1 10 s 100 s P tot [W] 40 I D [A] 100 DC 1 ms 10 ms 20 10-1 0 0 40 80 120 160 10-2 100 101 102 103 T C [C] V DS [V] 3 Max. transient thermal impedance I D=f(V DS); T j=25 C parameter: D=t p/T 101 4 Typ. output characteristics I D=f(V DS); T j=25 C parameter: V GS 20 20 V 7V 16 0.5 6.5 V 100 Z thJC [K/W] 12 0.2 0.1 0.05 0.02 0.01 single pulse I D [A] 6V 8 10 -1 5.5 V 4 5V 4.5 V 4V 10-2 10-6 10-5 10-4 10-3 10-2 10-1 100 0 0 5 10 15 20 t p [s] V DS [V] Rev. 1.5 Page 5 2008-04-11 SPD06N60C3 5 Typ. output characteristics I D=f(V DS); T j=150 C parameter: V GS 8 20 V 7V 6.5 V 5.5 V 6V 6 Typ. drain-source on-state resistance R DS(on)=f(I D); T j=150 C parameter: V GS 4 4V 4.5 V 5V 5.5 V 6 3 6V R DS(on) [] 5V I D [A] 20 V 4 2 4.5 V 2 4V 1 0 0 5 10 15 20 0 0 2 4 6 8 10 V DS [V] I D [A] 7 Drain-source on-state resistance R DS(on)=f(T j); I D=3.9 A; V GS=10 V 8 Typ. transfer characteristics I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j 2 25 25 C 1.6 20 R DS(on) [] 1.2 15 98 % 0.8 I D [A] typ 10 150 C 0.4 5 0 -60 -20 20 60 100 140 180 0 0 2 4 6 8 10 T j [C] V GS [V] Rev. 1.5 Page 6 2008-04-11 SPD06N60C3 9 Typ. gate charge V GS=f(Q gate); I D=6.2 A pulsed parameter: V DD 12 10 Forward characteristics of reverse diode I F=f(V SD) parameter: T j 102 10 25 C 120 V 480 V 25 C, 98% 150 C, 98% 8 101 150 C V GS [V] 6 I F [A] 100 10-1 0 10 20 30 0 0.5 1 1.5 2 2.5 4 2 0 Q gate [nC] V SD [V] 11 Avalanche SOA I AR=f(t AR) parameter: T j(start) 8 12 Avalanche energy E AS=f(T j); I D=3.1 A; V DD=50 V 250 200 6 150 4 E AS [mJ] 125 C 25 C -3 -2 -1 0 1 2 3 I AV [A] 100 2 50 0 10 10 10 10 10 10 10 0 20 60 100 140 180 t AR [s] T j [C] Rev. 1.5 Page 7 2008-04-11 SPD06N60C3 13 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=0.25 mA 14 Typ. capacitances C =f(V DS); V GS=0 V; f =1 MHz 700 104 660 103 Ciss V BR(DSS) [V] C [pF] 620 102 Coss 580 101 Crss 540 -60 -20 20 60 100 140 180 100 0 100 200 300 400 500 T j [C] V DS [V] 15 Typ. C oss stored energy E oss= f(V DS) 5 4 3 E oss [J] 2 1 0 0 100 200 300 400 500 600 V DS [V] Rev. 1.5 Page 8 2008-04-11 SPD06N60C3 Definition of diode switching characteristics Rev. 1.5 Page 9 2008-04-11 SPD06N60C3 PG-TO252-3-1: Outline , PG-TO-252-3-11 (D-PAK), PG-TO-252-3-21 (D-PAK) Rev. 1.5 Page 10 2008-04-11 SPD06N60C3 Rev. 1.5 Page 11 2008-04-11 |
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